Andrew Wade

Semiconductor crystals could be key to extending Moore’s Law

News

IBM researchers have developed a process for growing crystals made from semiconductor materials, which they claim can then be integrated onto silicon chips in a crucial step forward for the future of computing. 

The Zurich-based team believes that its work, published in Applied Physics Letters, will allow integrated circuits to continue reducing in size and cost, while simultaneously increasing performance.

Electron microscope images of the single crystal structures. For better visibility, the silicon is coloured in green, and the compound semiconductor in red.
Electron microscope images of the single crystal structures. For better visibility, the silicon is coloured in green, and the compound semiconductor in red.

This will enable an extension of Moore’s Law, an observation made by Intel co-founder Graham Moore in 1965 that the number of transistors per square inch on integrated circuits doubled every year. Although Moore speculated that the trend would continue indefinitely, there has been concern that existing technologies are reaching the limits of their capabilities.

“The whole semiconductor industry wants to keep Moore’s Law going,” said Heinz Schmid, a researcher with IBM Research GmbH at Zurich Research Laboratory in Switzerland and the lead author of the paper. “We need better performing transistors as we continue down-scaling, and transistors based on silicon won’t give us improvements anymore.”

To combat the limitations imposed by silicon, the team fabricated single crystal nanostructures made with III-V materials, including alloys of indium, gallium and arsenide. III-V semiconductors are believed to be a potential future material for computer chips, but their integration onto silicon has been unsuccessful up until now.

The crystals were grown using a technique called template-assisted selective epitaxy (TASE) using metal organic chemical vapour deposition. It allowed the team to develop defect-free crystals, and to lithographically define oxide templates and fill them via epitaxy, making nanowires, cross junctions, nanostructures containing constrictions and 3D stacked nanowires.

According to Schmid, more work is required before the same level of control can be exerted over III-V materials as currently exists for silicon, but the new method is the key to integrating the technology with silicon platforms.

“What sets this work apart from other methods is that the compound semiconductor does not contain detrimental defects, and that the process is fully compatible with current chip fabrication technology,” he said in a statement. “Importantly the method is also economically viable.”